Microchip LAN9662 Integration with P-Net Profinet Stack

Introduction of LAN9662 with Profinet Solution:

The Microchip LAN9662 is a compact and cost-effective, multi-port Gigabit AVB/TSN Ethernet Switches with two integrated 10/100/1000BASE-T PHYs and a 600 MHz ARM Cortex A7 CPU subsystem. A notable feature of the LAN9662 is its compatibility with RT-Labs’ P-Net Profinet stack, which has been meticulously designed to leverage the networking hardware offload capabilities innate to the LAN9662. When this hardware offload is activated, the Profinet cyclic data frames, which are pivotal for real-time communication, are autonomously managed by LAN9662’s Real-Time Engine (RTE). This RTE configuration is not just static but can be dynamically allocated either to SRAM or a QSPI HW device, offering versatility in data management.

However, while the RTE takes charge of cyclic data frames, the P-Net stack retains its authority over all non-cyclic Profinet frames, ensuring a balanced distribution of responsibilities. This integration also benefits from the MERA library, an offering from Microchip, which serves as the bridge for all interactions between P-Net and the LAN9662 RTE. To facilitate the understanding and deployment of this integration, developers are provided with a comprehensive set of CMake options for build-time configurations. These configurations enable the P-Net stack to recognize and fully support the features of LAN9662. Once the build-time configurations are set, the application then decides on the employment of the hardware offload during the initialization phase of the p-net stack.

Practical Implementation, Sample Application, and Resources:

For developers and professionals seeking a hands-on experience, the EVB-LAN9662 serves as a practical platform. Both the primary P-Net sample application and the specialized LAN9662 sample application have been optimized for seamless operation on the EVB-LAN9662. Utility tools have been embedded to assist in configurations, ensuring a smooth operation. Further diving into practicalities, the LAN9662 sample application provides an in-depth view of data processes and their mapping dynamics to the RTE. This application is versatile, with three distinct operational modes – ‘none’, ‘cpu’, and ‘full’, each catering to different requirements.

A salient feature to highlight is the application’s ability to map process data to QSPI. If the data is managed by the application and isn’t mapped to QSPI, the application can effortlessly enable the hardware offload, ensuring a smooth transition without necessitating any changes in the application. This ease of operation is further illustrated in the sample script p-net/samples/pn_dev_lan9662/switchdev-profinet-example.sh, which delineates the system configurations required for a 2-port Profinet device application. Lastly, Microchip’s provision of pre-built buildroot images for the LAN9662, coupled with the MERA RTE API interface, ensures that developers have all the resources and documentation they need for a successful integration.

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